the cost of NAND flash is likely to drop faster than DRAM. This, in turn, will result in the economic ratio dropping further leading to a reduction in the break-even interval.

Second, modern PCIe SSD is a highly parallel device that can provide very high random I/O throughput by servicing multiple outstanding I/Os concurrently. New non-volatile memory technologies like 3D XPoint promise further improvements in both throughput and access latencies over NAND flash. With interfaces like NVMe, the end-to-end latency of accessing data from PCIe 3D XPoint SSDs is just tens of µs. Thus, further improvements in non-volatile solid-state storage media will result in a drop in technology ratio, thereby reducing the break-even interval further.

Third, SSDs consume substantially
lower power than DRAM. The Intel 750
SSD consumes 4W of power when idle
and 22W when active. In contrast, 1TB
of DRAM in a server would consume
50W when idle and 100W when active. 1
It is also well known that DRAM power
consumption increases non-linearly
with capacity, as high-density DRAM
consumes substantially more power
than their low-density counterparts.
A recent study that focuses on power
DRAM-based SSD products. By the mid
2000s, improvements in performance
and reliability of NAND flash resulted
in flash-based serial AT attachment
(SATA) SSDs gaining popularity in
niche application domains. The late
2000s witnessed the emergence of a
new breed of peripheral component
interconnect express (PCIe) flash SSDs
that could deliver two orders of mag-
nitude higher throughput than their
SATA counterparts. Since then, a rapid
increase in capacity, drop in pricing,
and new low-overhead interfaces like
non-volatile memory express (NVMe),
have all resulted in PCIe flash SSDs
displacing their SATA counterparts as
server accelerators of choice.

Table 4 (first row) shows the price/ performance characteristics of a representative, state-of-the-art PCIe SSD. In comparison to Table 1, we find the PCIe SSD offers five times higher read IOPS and sequential access bandwidth than its SATA counterpart.

NVDIMM. As SSD vendors continue to improve throughput and capacity, the bottleneck in the storage subsys-tem has shifted from the device itself to the PCIe bus that is used to interface with the SSD. Thus, over the past few years, NAND flash has started transitioning once again from storage devices that are interfaced via the high-latency, bandwidth-limited PCIe bus into non-volatile memory (NVM) devices that are interfaced via the low-latency, high-bandwidth memory bus. These devices, also referred to as non-volatile DIMMs (NVDIMM), use a combination of DRAM and flash storage media packaged together as a dual inline memory module (DIMM).

NVM. Today, NVDIMMs are niche accelerators compared to PCIe SSDs due to a high cost/GB. Unlike these NVDIMM technologies that rely on NAND flash, new NVM technologies that are touted to have better endurance, higher throughput, and lower latency than NAND flash are being actively developed.

Table 4 (second row) shows the
characteristics of Intel Optane DC
P4800X—a PCIe SSD based on 3D
XPoint, a new phase-changed-media-
based NVM technology. The cost/GB
of 3D XPoint is higher than NAND
flash today as the technology is yet to
mature. However, preliminary studies
have found that 3D XPoint provides
predictable access latencies that are
much lower than several state-of-the-
art NAND flash devices even under se-
vere load. 23
Break-even interval and implica-
tions. When we apply the five-minute
rule formula using metrics given in
Table 4, we get a break-even interval
of one minute for 4KB pages in both
the DRAM–NAND Flash PCIe SSD and
DRAM–3D XPoint cases. Comparing
these results with Table 2, we see that
the breakeven interval is 10× shorter
when PCIe SSDs or new PM technolo-
gies are used as the second tier instead
of SATA SSDs. This can be attributed to
the drop in technology ratio caused by
the improvement in random IOPS.
Implications. Today, in the era of
in-memory data management, several
database engines are designed based
on the assumption that all data is resi-
dent in DRAM. However, the dramatic
drop in breakeven interval computed
by the five-minute rule challenges this
trend of DRAM-based in-memory data
management due to three reasons.
First, recent projections indicate that
flash density is expected to increase
40% annually over the next five years. 5
DRAM, in contrast, is doubling in ca-
pacity every three years. 17 As a result,

Table 2. The evolution of the page size for which the five-minute rule holds across four decades based on appropriate price, performance, and page size values.

1987 1997 2007 2018

Break-even (4KB page) 100s 9m 1.5h 4h Page size (5-minute interval) 1KB 8KB 64KB 512KB

Table 3. The evolution of the break-even interval across four decades based on appropriate price, performance, and page size values.

Tier 1987 1997 2007 2018 DRAM–SSD — — 15m 5m SSD–HDD — — 2.25h 1.5d

Table 4. Price/performance metrics for the NAND-based Intel 750 PCIe SSD and 3D-XPoint- based Intel Optane P4800X PCIe SSD.

Device Capacity Price($) IOPS(k) B/w(GB/s) Intel 750 800GB 589 460 2. 5 Intel P4800X 480GB 617 550 2. 5