To be sure, GlobalFoundries and
others (including TSMC) can still build
very powerful products using older
technologies. Moreover, Shih notes,
“Some people say that, once we went
below 14nm, or perhaps even higher
like 22nm, the unit cost per transis-
tor stopped decreasing and started in-
creasing again.” As a result, “more and
more users say ‘That [leading-edge]
process is so expensive, I actually don’t
need it,’” he said, unless they are “mak-
ing things for cellphones or FPGAs or
the bleeding-edge stuff like Intel micro-
processors, where you really need the
ultimate in performance and power.”
Indeed, a manufacturer that spe-
cializes in digital logic may not need a
broad range of processes. In contrast,
foundries support a whole range of
devices, such as image sensors, and
devices for analog, radio-frequency,
and ultra-low-power circuits. Reliably
implementing such mix-and-match
processes in a design environment
that lets multiple customers use them
is often more important to designers
than having the latest-generation tech-
nology. For example, although TSMC
boasts dozens of high-end customers
for its 7nm process, for example, it con-
tinues to support older-generation pro-
cesses, even the 180nm technology it
introduced 20 years ago, which is good
enough for many customers.
If leading-edge development slows
down, though, it might give other
companies, including those in mainland China, more chance to compete.
“The Chinese are having trouble at
the leading edge, but they’re catching
up on some of the trailing-edge tech-
nologies,” Shih said. “The thing that is
driving TSMC is less competition from
GlobalFoundries; it’s competition from
Made in China 2025 [a Chinese pro-
gram to improve domestic manufactur-
ing competitiveness].”
A Bright Future?
In the end, though, no amount of innovation can extend exponential scaling forever. Logic designers “are waiting for EUV to save the game,” Gargini
said, but even if advanced lithography
buys a few years, “that solution comes
to an end.” In perhaps 2020 or 2021,
he conjectured, “Samsung, TSMC, or
Intel, one of them will make a big announcement that their next product is
3D [three-dimensional],” which would
offer more transistors through vertical stacking. Memory manufacturers
(including Samsung) have already begun to introduce 3D structures, both by
stacking processed layers and growing
multiple layers of devices (see “
Electronics are Leaving the Plane,”
Communications, August 2018). Memory has
special advantages for 3D structures,
such as uniform and redundant layouts,
and low power (because most transistors are idle).
In contrast, in logic applications,
many more transistors are active, and
removing the heat they produce is enor-
mously challenging even in the easier-
to-cool planar layout. So far, logic com-
panies are testing the 3D waters with
advanced packaging techniques for
GPUs and other high-performance prod-
ucts. “We still can squeeze another two
or three generations out of 2D,” Gargini
said, but he sees full 3D as inevitable and
adding another 15 years of performance
growth. “3D is not really as much of a
revolution” or as risky as the process in-
novations the industry has already im-
plemented, he said. “The big guys can
do it anytime they decide to do it.”
The semiconductor industry faces
challenges that we may look back on
as the end of Moore’s Law. Nonethe-
less, there are continued opportunities
for better products, and so far there
are still foundry companies ready and
able to enable new designs. “There is a
bright future,” Gargini insists. “I think
it’s a very good balance.”
Further Reading
International Roadmap for Devices and
Systems 2017 Edition, IEEE,
https://irds.ieee.org/roadmap-2017
Shih, W. C., Chien, C.F., Shih, C., and Chang, J.
The TSMC Way: Meeting Customer Needs at
Taiwan Semiconductor Manufacturing Co.,
Harvard Business School Case Collection
610-003, August 2009, https://www.hbs.
edu/faculty/Pages/ item.aspx?num=37868
Monroe, D.
Electronics are Leaving the Plane,
Communications, August 2018,
https://cacm.acm.org/
magazines/2018/8/229776-electronics-are-
leaving-the-plane/fulltext
Don Monroe is a science and technology writer based in
Boston, MA, USA.
© 2019 ACM 0001-0782/19/6 $15.00
ACM and the Computer Science
Teachers Association (CSTA) will
bestow the 2018–2019 Cutler-Bell
Prize promoting computer science
and empowering students to
pursue computing challenges
beyond the classroom upon four
graduating high school students.
Each will receive a $10,000
cash prize toward tuition at the
institution they will attend next year.
The winning projects illustrate
the diverse applications being
developed by the next generation
of computer scientists:
NAVEEN DURVASULA,
SILVER SPRING, MD
Durvasula developed a method to
predict, for a given patient-donor
pair, the expected quality and
waiting time of the transplant
they would receive through
kidney exchange.
ISHA PURI,
CHAPPAQUA, NY
Puri focused on development of
a system to detect the direction
and frequency of gaze fixation to
test for and diagnose dyslexia.
ESHIKA SAXENA,
BELLEVUE, WA
Saxena developed the
“HemaCam,” a clip-on attachment
that turns a smartphone camera
into a microscope capable of
capturing blood cell images for
disease screening.
VARUN SHENOY,
CUPERTINO, CA
Shenoy created an effective
method to diagnose the onset
of wound complications during
surgical operations.
Said ACM president Cherri M.
Pancake. “These are the kinds of
skills students will increasingly
need in our digital age. In short,
the Cutler-Bell Prize encourages
students to see the possibilities, as
well as the excitement, that
computing offers.”
Added CSTA executive director
Jake Baskin, “Our winners have
created projects that have
applicable real-world solutions, all
resulting from the high-quality
computer science education they
have received.”
Milestones
ACM, CSTA Announce Cutler-Bell Prize Winners