Communications - February 2011

cally difficult for the operating system
to manage, and the same thing hap-
pens in memories. The fact everything
is changing means you have to go back
and reexamine all the algorithmic is-
sues that arise.”
In the case of power management
in a parallel environment, Cameron
says his research has shown that one
cannot take the principles of Amdahl’s
Law for parallelization—which states
that any parallelized program can only
speed up at the percentage of a given
task within that program not run se-
rially—and get a correct assumption
about power savings by simply taking
into account the processors running a
given application.

“In Amdahl’s Law, you have one thing that changes, the number of processors,” Cameron says. “In our generalization, we ask what if you have two observable changes? You might think you could apply Amdahl’s Law in two dimensions, but there are interactive effects between the two. In isolation, you could measure both of those using Amdahl’s Law, but it turns out there is a third term, of the combined effects working in conjunction, and that gets missed if you apply them one at a time.”

Doing nothing Well

In the long term, power management may borrow from sensor networks and embedded systems, which have extensively dealt with power constraints. Both David Culler, professor of computer science at the University of California, Berkeley, and Bernard Meyer-son, vice president of innovation at IBM, cite the disproportionally large power demands of processors doing little or no work as an area where great savings may be realized.

Culler says processor design might
take a lesson from network sensor de-
sign in principle. Measuring perfor-
mance during active processing “talk”
time is misplaced, he says. Instead,
efficiency must be introduced while
awaiting instruction—“talk is cheap,
listening is hard.”
Culler says theories behind effec-
tively shutting down idle processors
(“doing nothing well”) essentially fall
into two basic camps that “hearken
back to dark ages”—the principles
following Token Ring or other time

in the long term,
processor power
management
may borrow from
sensor networks
and embedded
systems, which have
extensively dealt with
power constraints.

division multiplex technologies, or a Carrier Sense Multiple Access approach akin to Ethernet topology, in which nodes about to transmit can first “sense” whether or not a network is idle before proceeding.

He says this principle can apply to any scenario, be it a Wi-Fi network or a bus protocol on a motherboard. “Doing nothing well and being able to respond to asynchronous events anyway is the key to power proportionality, and can apply across the board,” says Culler.

management from a chip

Market demand for dynamically provisioned processors is still an unknown. Albers says processor-level power management is not particularly viewed as a critical issue among European users.

“Energy and environmental issues have always received considerable attention in Europe. However, the typical person is probably more concerned about energy consumption in his household and private car than about the consumption of his PC or laptop,” Albers observes.

IBM has placed a bet on combining
chip-level energy allotment with the
network architectures of homes and
offices. The company has introduced
fabricating technology for dedicated
power management chips that control
power usage while they communicate
wirelessly in real time with systems
used to monitor smart buildings, en-
ergy grids, and transportation systems.
The main function of power-manage-
ment chips is to optimize power usage
and serve as bridges so electricity can
flow uninterrupted among systems
and electronics that require varying
levels of current.

Further Reading Albers, S. Energy-efficient algorithms, Communications of the ACM 53, 5, May 2010. Bansal, N., Kimbrel, T., and Pruhs, K. Speed scaling to manage energy and temperature, Journal of the ACM 54, 1, March 2007. Ge, R. and Cameron, K. W. Power-aware speedup. IEEE International Parallel and Distributed Processing Symposium, Long Beach, CA, March 26–March 30, 2007. Gupta, R., Irani, S., and Shukla, S. Formal methods for dynamic power management. Proceedings of the International Conference on Computer Aided Design, San Jose, CA, nov. 11–13, 2003.

Yao, F., Demers, A., and Shenker, S.
A scheduling model for reduced CPU
energy. Proceedings of the 36th IEEE
Symposium on Foundations of Computer
Science, Milwaukee, WI, Oct. 23–25, 1995.