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John L. Hennessy ( email@example.com) is
Past-President of Stanford University, Stanford, CA, USA,
and is Chairman of Alphabet Inc., Mountain View, CA, USA.
David A. Patterson ( firstname.lastname@example.org) is the Pardee
Professor of Computer Science, Emeritus at the University
of California, Berkeley, CA, USA, and a Distinguished
Engineer at Google, Mountain View, CA, USA.
© 2019 ACM 0001-0782/19/2 $15.00
back to measure, run real programs,
and show to their friends and family is
a great joy of hardware design.
Many researchers assume they must
stop short because fabricating chips is
unaffordable. When designs are small,
they are surprisingly inexpensive. Architects can order 100 1-mm2 chips for only
$14,000. In 28 nm, 1 mm2 holds millions
of transistors, enough area for both a
RISC-V processor and an NVLDA accelerator. The outermost level is expensive
if the designer aims to build a large chip,
but an architect can demonstrate many
novel ideas with small chips.
“The darkest hour is just before the
dawn.” —Thomas Fuller, 1650
To benefit from the lessons of history, architects must appreciate that
software innovations can also inspire
architects, that raising the abstraction
level of the hardware/software interface
yields opportunities for innovation, and
that the marketplace ultimately settles
computer architecture debates. The
iAPX-432 and Itanium illustrate how
architecture investment can exceed returns, while the S/360, 8086, and ARM
deliver high annual returns lasting decades with no end in sight.
The end of Dennard scaling and
Moore’s Law and the deceleration of performance gains for standard microprocessors are not problems that must be
solved but facts that, recognized, offer
breathtaking opportunities. High-level,
domain-specific languages and architectures, freeing architects from the
chains of proprietary instruction sets,
along with demand from the public for
improved security, will usher in a new
golden age for computer architects.
Aided by open source ecosystems, agilely developed chips will convincingly
demonstrate advances and thereby
accelerate commercial adoption. The
ISA philosophy of the general-purpose
processors in these chips will likely be
RISC, which has stood the test of time.
Expect the same rapid improvement as
in the last golden age, but this time in
terms of cost, energy, and security, as
well as in performance.
The next decade will see a Cambrian explosion of novel computer architectures, meaning exciting times for
computer architects in academia and
To watch Hennessy and
Patterson’s full Turing Lecture, see