architectures and multiple execution engines (cores) but have grown to include all sorts of additional functions, including floating-point units, caches, memory controllers, and media-pro-cessing engines. However, the defining characteristics of a microprocessor remain—a single semiconductor chip embodying the primary computation (data transformation) engine in a computing system.

Because our own greatest access and insight involves Intel designs and data, our graphs and estimates draw heavily on them. In some cases, they may not be representative of the entire industry but certainly represent a large fraction. Such a forthright view, solidly grounded, best supports our goals for this article.

20 Years of exponential
Performance Gains

For the past 20 years, rapid growth in microprocessor performance has been enabled by three key technology drivers—transistor-speed scaling, core microarchitecture techniques, and cache memories—discussed in turn in the following sections:

Transistor-speed scaling. The MOS transistor has been the workhorse for decades, scaling in performance by nearly five orders of magnitude and providing the foundation for today’s unprecedented compute performance. The basic recipe for technology scaling was laid down by Robert N. Dennard of IBM17 in the early 1970s and followed for the past three decades. The scaling recipe calls for reducing transistor

figure 1. evolution of Intel microprocessors 1971–2009.

Intel 4004, 1971
1 core, no cache
23K transistors
Intel 8088, 1978
1 core, no cache
29K transistors
Intel Mehalem-eX, 2009
8 cores, 24MB cache
2.3B transistors

figure 2. architecture advances and energy efficiency.

Die area Integer Performance (X)

FP Performance (X)

Int Performance/ Watt (X)

386 to 486

4

486 to Pentium

3

Increase (x)

2

Pentium to P6 P6 to Pentium 4

Pentium 4 to Core

1

0

on-die cache,
pipelined
Super-scalar
ooo-Speculative
Deep pipeline
Back to non-deep
pipeline

dimensions by 30% every generation (two years) and keeping electric fields constant everywhere in the transistor to maintain reliability. This might sound simple but is increasingly difficult to continue for reasons discussed later. Classical transistor scaling provided three major benefits that made possible rapid growth in compute performance.

First, the transistor dimensions are scaled by 30% (0.7x), their area shrinks 50%, doubling the transistor density every technology generation—the fundamental reason behind Moore’s Law. Second, as the transistor is scaled, its performance increases by about 40% (0.7x delay reduction, or 1.4x frequency increase), providing higher system performance. Third, to keep the electric field constant, supply voltage is reduced by 30%, reducing energy by 65%, or power (at 1.4x frequency) by 50% (active power = CV2f). Putting it all together, in every technology generation transistor integration doubles, circuits are 40% faster, and system power consumption (with twice as many transistors) stays the same. This serendipitous scaling (almost too good to be true) enabled three-orders-of-magnitude increase in microprocessor performance over the past 20 years. Chip architects exploited transistor density to create complex architectures and transistor speed to increase frequency, achieving it all within a reasonable power and energy envelope.

Core microarchitecture techniques. Advanced microarchitectures have deployed the abundance of transistor-integration capacity, employing a dizzying array of techniques, including pipelining, branch prediction, out-of-order execution, and speculation, to deliver ever-increasing performance. Figure 2 outlines advances in microarchitecture, showing increases in die area and performance and energy efficiency (performance/watt), all normalized in the same process technology. It uses characteristics of Intel microprocessors (such as 386, 486, Pentium, Pentium Pro, and Pentium 4), with performance measured by benchmark SpecInt ( 92, 95, and 2000 representing the current benchmark for the era) at each data point. It compares each microarchitecture advance with a design without the ad-