DoI: 10.1145/1941487.1941507

Energy efficiency is the new fundamental
limiter of processor performance,
way beyond numbers of processors.
BY sheKhaR BoRKaR anD anDRe W a. ChIen
the future
of
microprocessors

MICroProCessors—sInGLe-ChIP CoMPUters—are the building blocks of the information world. Their performance has grown 1,000-fold over the past 20 years, driven by transistor speed and energy scaling, as well as by microarchitecture advances that exploited the transistor density gains from Moore’s Law. In the

 

next two decades, diminishing transistor-speed scaling and practical energy limits create new challenges for continued performance scaling. As a result, the frequency of operations will increase slowly, with energy the key limiter of performance, forcing designs to use large-scale parallelism, heterogeneous cores, and accelerators to achieve performance and energy efficiency. Software-hardware partnership to achieve efficient data orchestration is increasingly critical in the drive toward energy-proportional computing.

Our aim here is to reflect and proj-
ect the macro trends shaping the fu-
ture of microprocessors and sketch in
broad strokes where processor design
is going. We enumerate key research
challenges and suggest promising
research directions. Since dramatic
changes are coming, we also seek to
inspire the research community to in-
vent new ideas and solutions address
how to sustain computing’s exponen-
tial improvement.

key insights

moore’s Law continues but demands radical changes in architecture and software.

architectures will go beyond homogeneous parallelism, embrace heterogeneity, and exploit the bounty of transistors to incorporate application-customized hardware.

software must increase parallelism and exploit heterogeneous and application-customized hardware to deliver performance growth.