Sora: High-Performance Software
Radio Using General-Purpose
Multi-Core Processors

abstract

This paper presents Sora, a fully programmable software radio platform on commodity PC architectures. Sora combines the performance and fidelity of hardware software-defined radio (SDR) platforms with the programmability and flexibility of general-purpose processor (GPP) SDR platforms. Sora uses both hardware and software techniques to address the challenges of using PC architectures for high-speed SDR. The Sora hardware components consist of a radio front-end for reception and transmission, and a radio control board for high-throughput, low-latency data transfer between radio and host memories. Sora makes extensive use of features of contemporary processor architectures to accelerate wireless protocol processing and satisfy protocol timing requirements, including using dedicated CPU cores, large low-latency caches to store lookup tables, and SIMD processor extensions for highly efficient physical layer processing on GPPs. Using the Sora platform, we have developed a few demonstration wireless systems, including Soft WiFi, an 802.11a/b/g implementation that seamlessly interoperates with commercial 802.11 NICs at all modulation rates, and SoftLTE, a 3GPP LTE uplink PHY implementation that supports up to 43.8Mbps data rate.

1. intRoDuction

Software-defined radio (SDR) holds the promise of fully programmable wireless communication systems, effectively supplanting current technologies which have the lowest communication layers implemented primarily in fixed, custom hardware circuits. Realizing the promise of SDR in practice, however, has presented developers with a dilemma.

Many current SDR platforms are based on either programmable hardware such as field programmable gate arrays (FPGAs) 8, 10 or embedded digital signal processors (DSPs). 6, 12 Such hardware platforms can meet the processing and timing requirements of modern high-speed wireless protocols, but programming FPGAs and specialized DSPs are difficult tasks. Developers have to learn how to program to each particular embedded architecture, often without the support of a rich development environment of programming and debugging tools. Such hardware platforms can also be expensive.

In contrast, SDR platforms based on general-purpose
processor (GPP) architectures, such as commodity PCs,
have the opposite set of trade-offs. Developers program to a
familiar architecture and environment using sophisticated
tools, and radio front-end boards for interfacing with a PC
are relatively inexpensive. However, since PC hardware and
software have not been designed for wireless signal process-
ing, existing GPP-based SDR platforms can achieve only lim-
ited performance. 1, 7 For example, the popular USRP/GNU
Radio platform is reported to achieve only 100kbps through-
put on an 8-MHz channel, 18 whereas modern high-speed
wireless protocols like 802.11 support multiple Mbps data
rates on a much wider 20-MHz channel. These constraints
prevent developers from using such platforms to achieve
the full fidelity of state-of-the-art wireless protocols while
using standard operating systems and applications in a real
environment.